1. Technical Field
The systems and methods disclosed herein relate to the field of cache memory management within a computer system and, more specifically, to methods and systems for determining cache addresses for use in cache memory replacement.
2. Description of the Related Art
Cache memory is used in various computer systems to increase processor performance by alleviating the need for the processor to fetch data directly from main system memory sources, such as, for example, dynamic random-access memory (DRAM). By using cache memory, a central processing unit (CPU) is capable of quickly fetching data from the main system memory sources, without incurring the wait-states associated with the main memory sources, thereby improving processor performance. For example, commonly used data is made readily available to the processor in a memory architecture that does not require paging cycles, that uses a relatively fast-access memory cell, and that places the cache in close proximity to the processor's local bus in order to reduce physical delay associated with bus structures.
In order to optimize use of the cache, especially as cache memories grow larger, strategies are needed to quickly and efficiently fetch addresses or data that is stored in the cache.
The description above is presented as a general overview of related art in this field and should not be construed as an express or implied admission that any of the information contained therein constitutes prior art against the present patent application.